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8284es?avr?02/2013 features ? high performance, low power atmel ? avr ? 8-bit microcontroller ? advanced risc architecture ? 130 powerful instructions ? most single clock cycle execution ? 32 8 general purpose working registers ? fully static operation ? up to 16mips throughput at16mhz (atmel atmega169a/169pa/649a/649p) ? up to 20 mips throughput at 20mhz (atmel atmega329a/329pa/3290a/3290pa/6490a/6490p) ? on-chip 2-cycle multiplier ? high endurance non-volatile memory segments ? in-system self-programmable flash program memory ? 16kbytes (atmel atmega169a/atmega169pa) ? 32kbytes (atmel atmega329a/atmega329pa/atmega3290a/atmega3290pa) ? 64kbytes (atmel atmega649a/atmega649p/atmega6490a/atmega6490p) ?eeprom ? 512bytes (atmega169a/atmega169pa) ? 1kbytes (atmega329a/atmega329pa/atmega3290a/atmega3290pa) ? 2kbytes (atmega649a/atmega649p/atmega6490a/atmega6490p) ? internal sram ? 1kbytes (atmega169a/atmega169pa) ? 2kbytes (atmega329a/atmega329pa/atmega3290a/atmega3290pa) ? 4kbytes (atmega649a/atmega649p/atmega6490a/atmega6490p) ? write/erase cyles: 10,000 flash/100,000 eeprom ? data retention: 20 years at 85c/100 years at 25c (1) ? optional boot code section with independent lock bits ? in-system programming by on-chip boot program ? true read-while-write operation ? programming lock for software security ? atmel qtouch ? library support ? capacitive touch buttons, sliders and wheels ? atmel qtouch and qmatrix acquisition ? up to 64 sense channels ? jtag (ieee std. 1149.1 compliant) interface ? boundary-scan capabilities according to the jtag standard ? extensive on-chip debug support ? programming of flash, eeprom, fuses, a nd lock bits through the jtag interface ? peripheral features ? 4 25 segment lcd driver (atmega169a/atmega169pa/atmega329a/atmega329pa/atmega649a/atmega649p) ? 4 40 segment lcd driver (atmega3290a/atmega3290pa/atmega6490a/atmega6490p) ? two 8-bit timer/counters with separate prescaler and compare mode ? one 16-bit timer/counter with separate prescaler, compare mode, and capture mode ? real time counter with separate oscillator ? four pwm channels ? 8-channel, 10-bit adc ? programmable serial usart ? master/slave spi serial interface ? universal serial interface with start condition detector ? programmable watchdog timer with separate on-chip oscillator ? on-chip analog comparator ? interrupt and wake-up on pin change ? special microcontroller features ? power-on reset and programmable brown-out detection ? internal calibrated oscillator ? external and internal interrupt sources ? five sleep modes: idle, adc noise reducti on, power-save, power-down, and standby ? i/o and packages ? 54/69 programmable i/o lines ? 64/100-lead tqfp, 64-pad qfn/mlf, and 64-pad drqfn ? speed grade: ? atmega169a/169pa/649a/649p: ? 0 - 16mhz @ 1.8 - 5.5v ? atmega3290a/3290pa/6490a/6490p: ? 0 - 20mhz @ 1.8 - 5.5v ? temperature range: ? -40c to 85c industrial ? ultra-low power consumption (picopower ? devices) ?active mode: ? 1mhz, 1.8v: 215a ? 32khz, 1.8v: 8a (including oscillator) ? 32khz, 1.8v: 25a (including oscillator and lcd) ? power-down mode: ? 0.1a at 1.8v ? power-save mode: ? 0.6a at 1.8v (including 32khz rtc) ? 750na at 1.8v atmel atmega169a/pa/329a/pa/3290a/pa/649a/p/6490a/p 8-bit atmel microcontroller with 16/ 32/64kb in-system programmable flash summary
2 atmega169a/pa/329a/pa/649a/p/3 290a/pa/6490a/p [summary] 8284es?avr?02/2013 1. pin configurations 1.1 pinout - 64a (tqfp) and 64m1 (qfn/mlf) figure 1-1. pinout atmel atmega169a/atmega169pa/atmega329a/atmega329pa/atmega649a/atmega649p. 64 63 62 47 46 48 45 44 43 42 41 40 39 38 37 36 35 33 34 2 3 1 4 5 6 7 8 9 10 11 12 13 14 16 15 17 61 60 18 59 20 58 19 21 57 22 56 23 55 24 54 25 53 26 52 27 51 29 28 50 49 32 31 30 pc0 (seg12) vcc gnd pf0 (adc0) pf7 (adc7/tdi) pf1 (adc1) pf2 (adc2) pf3 (adc3) pf4 (adc4/tck) pf5 (adc5/tms) pf6 (adc6/tdo) aref gnd avcc (rxd/pcint0) pe0 (txd/pcint1) pe1 lcdcap (xck/ain0/pcint2) pe2 (ain1/pcint3) pe3 (usck/scl/pcint4) pe4 (di/sda/pcint5) pe5 (do/pcint6) pe6 (clko/pcint7) pe7 (ss/pcint8) pb0 (sck/pcint9) pb1 (mosi/pcint10) pb2 (miso/pcint11) pb3 (oc0a/pcint12) pb4 (oc2a/pcint15) pb7 (t1/seg24) pg3 (oc1b/pcint14) pb6 (t0/seg23) pg4 (oc1a/pcint13) pb5 pc1 (seg11) pg0 (seg14) (seg15) pd7 pc2 (seg10) pc3 (seg9) pc4 (seg8) pc5 (seg7) pc6 (seg6) pc7 (seg5) pa7 (seg3) pg2 (seg4) pa6 (seg2) pa5 (seg1) pa4 (seg0) pa3 (com3) pa0 (com0) pa1 (com1) pa2 (com2) pg1 (seg13) (seg16) pd6 (seg17) pd5 (seg18) pd4 (seg19) pd3 (seg20) pd2 (int0/seg21) pd1 (icp1/seg22) pd0 (tosc1) xtal1 (tosc2) xtal2 reset/pg5 gnd vcc index corner
3 atmega169a/pa/329a/pa/649a/p/3 290a/pa/6490a/p [summary] 8284es?avr?02/2013 1.2 pinout - 100a (tqfp) figure 1-2. pinout atmel atmega3290a/atmega3290pa/atmega6490a/atmega6490p. note: the large center pad underneath the qfn/mlf packages is made of metal and internally connected to gnd. it should be sol- dered or glued to the board to ensure good mechanical stability. if the center pad is left unconnected, the package might loose n from the board. (oc2a/pcint15) pb7 dnc (t1/seg33) pg3 (t0/seg32) pg4 reset/pg5 vcc gnd (tosc2) xtal2 (tosc1) xtal1 dnc dnc (pcint26/seg31) pj2 (pcint27/seg30) pj3 (pcint28/seg29) pj4 (pcint29/seg28) pj5 (pcint30/seg27) pj6 dnc (icp1/seg26) pd0 (int0/seg25) pd1 (seg24) pd2 (seg23) pd3 (seg22) pd4 (seg21) pd5 (seg20) pd6 (seg19) pd7 avcc agnd aref pf0 (adc0) pf1 (adc1) pf2 (adc2) pf3 (adc3) pf4 (adc4/tck) pf5 (adc5/tms) pf6 (adc6/tdo) pf7 (adc7/tdi) dnc dnc ph7 (pcint23/seg36) ph6 (pcint22/seg37) ph5 (pcint21/seg38) ph4 (pcint20/seg39) dnc dnc gnd vcc dnc pa0 (com0) pa1 (com1) pa2 (com2) pa3 (com3) pa4 (seg0) pa5 (seg1) pa6 (seg2) pa7 (seg3) pg2 (seg4) pc7 (seg5) pc6 (seg6) dnc ph3 (pcint19/seg7) ph2 (pcint18/seg8) ph1 (pcint17/seg9) ph0 (pcint16/seg10) dnc dnc dnc dnc pc5 (seg11) pc4 (seg12) pc3 (seg13) pc2 (seg14) pc1 (seg15) pc0 (seg16) pg1 (seg17) pg0 (seg18) index corner 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76 lcdcap (rxd/pcint0) pe0 (txd/pcint1) pe1 (xck/ain0/pcint2) pe2 (ain1/pcint3) pe3 (usck/scl/pcint4) pe4 (di/sda/pcint5) pe5 (do/pcint6) pe6 (clko/pcint7) pe7 vcc gnd dnc (pcint24/seg35) pj0 (pcint25/seg34) pj1 dnc dnc dnc dnc (ss/pcint8) pb0 (sck/pcint9) pb1 (mosi/pcint10) pb2 (miso/pcint11) pb3 (oc0a/pcint12) pb4 (oc1a/pcint13) pb5 (oc1b/pcint14) pb6 tqfp
4 atmega169a/pa/329a/pa/649a/p/3 290a/pa/6490a/p [summary] 8284es?avr?02/2013 1.3 pinout - 64mc (drqfn) figure 1-3. pinout atmel atmega169a/atmega169pa. table 1-1. drqfn-64 pinout atmega169a/atmega169pa . top view bottom view a1 b1 a2 b2 a3 b3 a4 b4 a5 b5 a6 b6 a7 b7 a8 a9 b8 a10 b9 a11 b10 a12 b11 a13 b12 a14 b13 a15 b14 a16 b15 a17 a25 b22 a24 b21 a23 b20 a22 b19 a21 b18 a20 b17 a19 b16 a18 a34 b30 a33 b29 a32 b28 a31 b27 a30 b26 a29 b25 a28 b24 a27 b23 a26 a1 b1 a2 b2 a3 b3 a4 b4 a5 b5 a6 b6 a7 b7 a8 a25 b22 a24 b21 a23 b20 a22 b19 a21 b18 a20 b17 a19 b16 a18 a17 b15 a16 b14 a15 b13 a14 b12 a13 b11 a12 b10 a11 b9 a10 b8 a9 a26 b23 a27 b24 a28 b25 a29 b26 a30 b27 a31 b28 a32 b29 a33 b30 a34 a1 pe0 a9 pb7 a18 pg1 (seg13) a26 pa 2 ( c o m 2 ) b1 vlcdcap b8 pb6 b16 pg0 (seg14) b23 pa 3 ( c o m 3 ) a2 pe1 a10 pg3 a19 pc0 (seg12) a27 pa 1 ( c o m 1 ) b2 pe2 b9 pg4 b17 pc1 (seg11) b24 pa 0 ( c o m 0 ) a3 pe3 a11 reset a20 pc2 (seg10) a28 vcc b3 pe4 b10 vcc b18 pc3 (seg9) b25 gnd a4 pe5 a12 gnd a21 pc4 (seg8) a29 pf7 b4 pe6 b11 xtal2 (tosc2) b19 pc5 (seg7) b26 pf6 a5 pe7 a13 xtal1 (tosc1) a22 pc6 (seg6) a30 pf5 b5 pb0 b12 pd0 (seg22) b20 pc7 (seg5) b27 pf4 a6 pb1 a14 pd1 (seg21) a23 pg2 (seg4) a31 pf3 b6 pb2 b13 pd2 (seg20) b21 pa7 (seg3) b28 pf2 a7 pb3 a15 pd3 (seg19) a24 pa6 (seg2) a32 pf1 b7 pb5 b14 pd4 (seg18) b22 pa4 (seg0) b29 pf0 a8 pb4 a16 pd5 (seg17) a25 pa5 (seg1) a33 aref b15 pd7 (seg15) b30 avcc a17 pd6 (seg16) a34 gnd
5 atmega169a/pa/329a/pa/649a/p/3 290a/pa/6490a/p [summary] 8284es?avr?02/2013 2. overview the atmel atmega169a/169pa/329a/329pa/3290a/3290pa/649a/649p/6490a/6490p is a low-power cmos 8-bit micro- controller based on the atmel ? avr ? enhanced risc architecture. by executing powerful instructions in a single clock cycle, the atmega169a/169pa/329a/329pa/3290a/3290pa/649a/649p/6490a/6490p achieves throughputs approaching 1 mips per mhz allowing the system designer to op timize power consumption versus processing speed. 2.1 block diagram figure 2-1. block diagram. the avr core combines a rich instruction set with 32 general purpose working registers. all the 32 registers are directly connected to the arithmetic logic unit (alu), allowing two independent registers to be accessed in one single instruction executed in one clock cycle. the result ing architecture is more c ode efficient while achieving throughputs up to ten times faster than conventional cisc microcontrollers. program counter internal oscillator watchdog timer stack pointer program flash mcu control register sram general purpose registers instruction register timer/ counters instruction decoder data dir. reg. portb data dir. reg. porte data dir. reg. porta data dir. reg. portd data register portb data register porte data register porta data register portd timing and control oscillator interrupt unit eeprom spi usart status register z y x alu portb drivers porte drivers porta drivers portf drivers portd drivers portc drivers pb0 - pb7 pe0 - pe7 pa0 - pa7 pf0 - pf7 vcc gnd xtal1 xtal2 control lines + - analog comparator pc0 - pc7 8-bit data bus reset calib. osc data dir. reg. portc data register portc on-chip debug jtag tap programming logic boundary- scan data dir. reg. portf data register portf adc pd0 - pd7 data dir. reg. portg data reg. portg portg drivers pg0 - pg4 agnd aref avcc universal serial interface avr cpu lcd controller/ driver porth drivers ph0 - ph7 data dir. reg. porth data register porth portj drivers pj0 - pj6 data dir. reg. portj data register portj
6 atmega169a/pa/329a/pa/649a/p/3 290a/pa/6490a/p [summary] 8284es?avr?02/2013 the atmel atmega169a/169pa/329a/329pa/3290a/3290pa/649a/649p/6490a/6490p provides the following fea- tures: 16k/32k/64k bytes of in-system programmable flash with read-w hile-write capabilities, 512/1k/2k bytes eeprom, 1k/2k/4k byte sram, 54/69 general purpose i/o lines, 32 general purpose working registers, a jtag interface for boundary-scan, on-chip debugging support and programming, a complete on-chip lcd controller with internal contrast control, three flexible timer/counter s with compare modes, internal and external interrupts, a serial programmable usart, universal serial interface with start condition detector, an 8-channel, 10-bit adc, a programmable watchdog timer with internal oscillator, an spi serial por t, and five software selectable power sav- ing modes. the idle mode stops the cpu while allowing the sram, timer/counters, spi port, and interrupt system to continue functioning. the power-down mode saves the register contents but freezes the oscillato r, disabling all other chip functions until the next interrupt or hardware reset. in power-save mode, the asynchronous timer and the lcd controller continues to run, allowing the user to maintain a timer base and operate the lcd display while the rest of the device is sleeping. the adc noise reduction mode stops the cpu and all i/o modules except asyn- chronous timer, lcd controller and adc, to minimize s witching noise during adc conversions. in standby mode, the xtal/resonator oscilla tor is running while the rest of the device is sleeping. this allows very fast start-up com- bined with low-powe r consumption. atmel offers the qtouch library for embedding capacitive touch buttons, sliders and wheels functionality into avr microcontrollers. the patented charge-transfer signal acquisition offers robust sensing and includes fully debounced reporting of touch keys and in cludes adjacent key suppression ? (aks ? ) technology for unambiguous detection of key events. the easy-to-use qtouch suite toolchain allows you to explore, develop and debug your own touch applications. the device is manufactured using the atmel high density non-volatile memory technology. the on-chip in-system re-programmable (isp) flash allows the program memory to be reprogrammed in-system through an spi serial interface, by a conventional non-volatile memory programmer, or by an on-chip boot program running on the avr core. the boot program can use any interface to download the application program in the application flash mem- ory. software in the boot flash section will continue to run while the applicatio n flash section is updated, providing true read-while-write operation. by combining an 8-bit risc cpu with in-system self-programmable flash on a monolithic chip, the atmega169a/169pa/329a/329pa/3290a/3290pa/649a/649p/6490a/6490p is a powerful microcontroller that pro- vides a highly flexible and cost effective solution to many embedded control applications. the atmega169a/169pa/329a/329pa/3290a/3290pa/649a/ 649p/6490a/6490p avr is supported with a full suite of program and system development tools including: c compilers, macro assemblers, program debug- ger/simulators, in-circuit emulators, and evaluation kits.
7 atmega169a/pa/329a/pa/649a/p/3 290a/pa/6490a/p [summary] 8284es?avr?02/2013 2.2 comparison between atmel atmega169a/169pa/329a/329pa/649a/ 649p/3290a/3290p a/6490a/6490p table 2-1. differences between: atmega169a/169pa/329a/329pa/649a/649p/3290a/3290pa/6490a/6490p. device flash eeprom ram lcd segments atmega169a 16kbyte 512bytes 1kbyte 4 25 atmega169pa 16kbyte 512bytes 1kbyte 4 25 atmega329a 32kbyte 1kbyte 2kbyte 4 25 atmega329pa 32kbyte 1kbyte 2kbyte 4 25 atmega3290a 32kbytes 1kbyte 2kbyte 4 40 atmega3290pa 32kbyte 1kbyte 2kbyte 4 40 atmega649a 64kbyte 2kbyte 4kbyte 4 25 atmega649p 64kbyte 2kbyte 4kbyte 4 25 atmega6490a 64kbyte 2kbyte 4kbyte 4 40 atmega6490p 64kbyte 2kbyte 4kbyte 4 40
8 atmega169a/pa/329a/pa/649a/p/3 290a/pa/6490a/p [summary] 8284es?avr?02/2013 2.3 pin descriptions the following section describes the i/o-pin special functions. 2.3.1 v cc digital supply voltage. 2.3.2 gnd ground. 2.3.3 port a (pa7...pa0) port a is an 8-bit bi-directional i/o port with internal pull-up resistors (selected for each bit). the port a output buf- fers have symmetrical drive ch aracteristics with both high si nk and source capability. as i nputs, port a pins that are externally pulled low will source current if the pull-up resistor s are activated. the port a pins are tri-stated when a reset condition becomes active, even if the clock is not running. port a also serves the functions of various special features of the atmel atmega169a/169pa/329a/329pa/3290a/3290pa/649a/649p/6490a/6490p as listed on page 73 . 2.3.4 port b (pb7...pb0) port b is an 8-bit bi-directional i/o port with internal pull-up resistors (selected for each bit). the port b output buf- fers have symmetrical drive ch aracteristics with both high si nk and source capability. as i nputs, port b pins that are externally pulled low will source current if the pull-up resistor s are activated. the port b pins are tri-stated when a reset condition becomes active, even if the clock is not running. port b has better driving c apabilities than th e other ports. port b also serves the functions of various special features of the atmega169a/169pa/329a/329pa/3290a/3290pa/649a/649p/6490a/6490p as listed on page 74 . 2.3.5 port c (pc7...pc0) port c is an 8-bit bi-directional i/o port with internal pull- up resistors (selected for each bit). the port c output buf- fers have symmetrical drive characteristi cs with both high sink and source capability. as input s, port c pins that are externally pulled low will source current if the pull-up resistors are activate d. the port c pins are tri-stated when a reset condition becomes active, even if the clock is not running. port c also serves the functions of special features of the atmega169a/169pa/329a/329pa/3290a/3290pa/649a/649p/6490a/6490p as listed on page 77 . 2.3.6 port d (pd7...pd0) port d is an 8-bit bi-directional i/o port with internal pull- up resistors (selected for each bit). the port d output buf- fers have symmetrical drive characteristi cs with both high sink and source capability. as input s, port d pins that are externally pulled low will source current if the pull-up resistors are activate d. the port d pins are tri-stated when a reset condition becomes active, even if the clock is not running. port d also serves the functions of various special features of the atmega169a/169pa/329a/329pa/3290a/3290pa/649a/649p/6490a/6490p as listed on page 78 . 2.3.7 port e (pe7...pe0) port e is an 8-bit bi-directional i/o port with internal pull-up resistors (selected for each bit). the port e output buf- fers have symmetrical drive ch aracteristics with both high si nk and source capability. as i nputs, port e pins that are externally pulled low will source current if the pull-up resistor s are activated. the port e pins are tri-stated when a reset condition becomes active, even if the clock is not running.
9 atmega169a/pa/329a/pa/649a/p/3 290a/pa/6490a/p [summary] 8284es?avr?02/2013 port e also serves the functions of various special features of the atmega169a/169pa/329a/329pa/3290a/3290pa/649a/649p/6490a/6490p as listed on page 80 . 2.3.8 port f (pf7...pf0) port f serves as the analog inputs to the a/d converter. port f also serves as an 8-bit bi-directional i/o port, if the a/d converter is not used. port pins can provide internal pull-up resistors (selected for each bit). the port f output buffers have symmetrical drive characteristics with both high sink and source capabilit y. as inputs, port f pins that are externa lly pulled low will source current if the pull-up resistors are activated. the port f pins are tri-stated when a reset condition becomes active, even if the clock is not running. if the jtag interface is en abled, the pull-up resistors on pins pf7(tdi), pf5(tms), and pf4(tck) will be activated even if a reset occurs. port f also serves the functions of the jtag interface. 2.3.9 port g (pg5...pg0) port g is a 6-bit bi-directional i/o port with internal pull- up resistors (selected for each bit). the port g output buf- fers have symmetrical drive characteristic s with both high sink and source capability. as inpu ts, port g pins that are externally pulled low will source current if the pull-up resistors are activated. the port g pins are tri-stated when a reset condition becomes active, even if the clock is not running. port g also serves the functions of various special features of the atmega169a/169pa/329a/329pa/3290a/3290pa/649a/649p/6490a/6490p as listed on page 84 . 2.3.10 port h (ph7...ph0) port h is a 8-bit bi-directional i/o port with internal pull- up resistors (selected for each bit). the port h output buf- fers have symmetrical drive characteristi cs with both high sink and source capability. as input s, port h pins that are externally pulled low will source current if the pull-up resistors are activate d. the port h pins are tri-stated when a reset condition becomes active, even if the clock is not running. port h also serves the functions of various special features of the atmega3290pa/6490p as listed on page 86 . 2.3.11 port j (pj6...pj0) port j is a 7-bit bi-directional i/o port with internal pull-up resistors (selected for each bit). the port j output buffers have symmetrical drive characteristics wi th both high sink and source capabilit y. as inputs, port j pins that are externally pulled low will source current if the pull-up resi stors are activated. the port j pins are tri-stated when a reset condition becomes active, even if the clock is not running. port j also serves the functions of various special features of the atmega3290pa/6490p as listed on page 88 . 2.3.12 reset reset input. a low le vel on this pin for longer than the minimum pulse le ngth will generate a reset, even if the clock is not running. the minimum pulse length is given in ?system and reset characteristics? on page 334 . shorter pulses are not guaranteed to generate a reset. 2.3.13 xtal1 input to the inverting oscillato r amplifier and input to the in ternal clock operating circuit. 2.3.14 xtal2 output from the invert ing oscillator amplifier.
10 atmega169a/pa/329a/pa/649a/p/3 290a/pa/6490a/p [summary] 8284es?avr?02/2013 2.3.15 avcc avcc is the supply voltage pin for port f and the a/d converter. it should be externally connected to v cc , even if the adc is not used. if the adc is used, it should be connected to v cc through a low-pass filter. 2.3.16 aref this is the analog reference pin for the a/d converter. 2.3.17 lcdcap an external capacitor (typical > 470 nf) must be connected to the lcdcap pin as shown in figure 24-2 , if the lcd module is enabled and configured to use internal power. this capacitor acts as a reservoir for lcd power (v lcd ). a large capacitance reduces ripple on v lcd but increases the time until v lcd reaches its target value.
11 atmega169a/pa/329a/pa/649a/p/3 290a/pa/6490a/p [summary] 8284es?avr?02/2013 3. resources a comprehensive set of development tools, applicati on notes and datasheets are available for download on http://www.atmel.com/avr. note: 1. 4. data retention reliability qualification re sults show that the projected data retention fa ilure rate is much less than 1 ppm over 20 years at 85c or 100 years at 25c. 5. about code examples this documentation contains simple code examples that br iefly show how to use various parts of the device. these code examples assume that the part specific header file is included before compilation. be aware that not all c compiler vendors include bit definitions in the header files and interrupt handling in c is compiler dependent. please confirm with the c compiler documentation for more details. for i/o registers located in extended i/o map, ?in?, ?out?, ?sbis?, ?sbic?, ?cbi?, and ?sbi? instructions must be replaced with instructions that allow access to ex tended i/o. typically ?lds? and ?sts? combined with ?sbrs?, ?sbrc?, ?sbr?, and ?cbr?. 6. capacitive touch sensing the atmel ? qtouch ? library provides a simple to use solution to realize touch sensitive interfaces on most atmel avr ? microcontrollers. the qtouch library incl udes support for the qtouch and qmatrix ? acquisition methods. touch sensing can be added to any application by linki ng the appropriate atmel qtouch library for the avr micro- controller. this is done by using a si mple set of apis to define the touch ch annels and sensors, and then calling the touch sensing api?s to retrieve the channel information and determine the touch sensor states. the qtouch library is free and downloadable from the atmel website at the following location: www.atmel.com/qtouchlibrary . for implementation details and other information, refer to the atmel qtouch library user guide - also available for download from the atmel website.
12 atmega169a/pa/329a/pa/649a/p/3 290a/pa/6490a/p [summary] 8284es?avr?02/2013 7. ordering information notes: 1. this device can also be supplied in wafer form. please contact your local atmel sales office for detailed ordering info rmation and minimum quantities. 2. pb-free packaging, complies to the european directive for restriction of hazardous subst ances (rohs directive). also halide free and fully green. 3. for speed vs. v cc , see figure 29-1 on page 332 . 4. tape & reel. 7.1 atmel atmega169a speed [mhz] (3) power supply ordering code (2) package type (1) operational range 16 1.8 - 5.5v atmega169a-au atmega169a-aur (4) atmega169a-mu atmega169a-mur (4) atmega169a-mch atmega169a-mchr (4) 64a 64a 64m1 64m1 64mc 64mc industrial (-4 0 ? c to 85 ? c) ATMEGA169A-AN ATMEGA169A-ANr (4) atmega169a-mn atmega169a-mnr (4) 64a 64a 64m1 64m1 extended (-4 0 ? c to 105 ? c) package type 64a 64-lead, thin (1.0mm) plastic gull wing quad flat package (tqfp) 64m1 64-pad, 9 9 1.0mm body, lead pitch 0.50mm, quad flat no-lead/micro lead frame package (qfn/ mlf) 64mc 64-lead (2-row staggered), 7 7 1.0mm body, 4.0 4. 0 mm exposed pad, quad fl at no-lead package (qfn)
13 atmega169a/pa/329a/pa/649a/p/3 290a/pa/6490a/p [summary] 8284es?avr?02/2013 7.2 atmel atmega169pa notes: 1. this device can also be supplied in wafer form. please contact your local atmel sales office for detailed ordering info rmation and minimum quantities. 2. pb-free packaging, complies to the european directive for restriction of hazardous subst ances (rohs directive). also halide free and fully green. 3. for speed vs. v cc , see figure 29-1 on page 332 . 4. tape & reel. 5. see characterization specification at 105c. speed [mhz] (3) power supply ordering code (2) package type (1) operational range 16 1.8 - 5.5v atmega169pa-au atmega169pa-aur (4) atmega169pa-mu atmega169pa-mur (4) atmega169pa-mch atmega169pa-mchr (4) 64a 64a 64m1 64m1 64mc 64mc industrial (-4 0 ? c to 85 ? c) atmega169pa-an atmega169pa-anr (4) atmega169pa-mn atmega169pa-mnr (4) 64a 64a 64m1 64m1 extended (-4 0 ? c to 105 ? c) (5) package type 64a 64-lead, thin (1.0mm) plastic gull wing quad flat package (tqfp) 64m1 64-pad, 9 9 1.0mm body, lead pi tch 0.50mm, quad flat no-lead/ micro lead frame package (qfn/mlf) 64mc 64-lead (2-row staggered), 7 7 1.0mm body, 4.0 4.0mm exposed pad, quad flat no-lead package (qfn)
14 atmega169a/pa/329a/pa/649a/p/3 290a/pa/6490a/p [summary] 8284es?avr?02/2013 7.3 atmel atmega329a notes: 1. this device can also be supplied in wafer form. please contact your local atmel sales office for detailed ordering info rmation and minimum quantities. 2. pb-free packaging complies to the european directive for re striction of hazardous substances (rohs directive). also halide free and fully green. 3. for speed vs. v cc see figure 29-2 on page 332 . 4. tape & reel. 5. see characterization specifications at 105c. speed [mhz] (3) power supply ordering code (2) package type (1) operational range 20 1.8 - 5.5v atmega329a-au atmega329a-aur (4) atmega329a-mu atmega329a-mur (4) 64a 64a 64m1 64m1 industrial (-4 0 ? c to 85 ? c) atmega329a-an atmega329a-anr (4) atmega329a-mn atmega329a-mnr (4) 64a 64a 64m1 64m1 extended (-4 0 ? c to 105 ? c) (5) package type 64a 64-lead, 14 14 1.0mm, thin profile plastic quad flat package (tqfp) 64m1 64-pad, 9 9 1.0mm, quad flat no-l ead/micro lead frame package (qfn/mlf)
15 atmega169a/pa/329a/pa/649a/p/3 290a/pa/6490a/p [summary] 8284es?avr?02/2013 notes: 1. this device can also be supplied in wafer form. please contact your local atmel sales office for detailed ordering info rmation and minimum quantities. 2. pb-free packaging complies to the european directive for re striction of hazardous substances (rohs directive). also halide free and fully green. 3. for speed vs. v cc see figure 29-2 on page 332 . 4. tape &reel. 5. see characterization specification at 105c. 7.4 atmel atmega329pa speed [mhz] (3) power supply ordering code (2) package type (1) operational range 20 1.8 - 5.5v atmega329pa-au atmega329pa-aur (4) atmega329pa-mu atmega329pa-mur (4) 64a 64a 64m1 64m1 industrial (-4 0 ? c to 85 ? c) atmega329pa-an atmega329pa-anr (4) atmega329pa-mn atmega329pa-mnr (4) 64a 64a 64m1 64m1 extended (-4 0 ? c to 105 ? c) (5) package type 64a 64-lead, 14 14 1.0mm, thin profile plastic quad flat package (tqfp) 64m1 64-pad, 9 9 1.0mm, quad flat no-l ead/micro lead frame package (qfn/mlf)
16 atmega169a/pa/329a/pa/649a/p/3 290a/pa/6490a/p [summary] 8284es?avr?02/2013 notes: 1. this device can also be supplied in wafer form. please contact your local atmel sales office for detailed ordering info rmation and minimum quantities. 2. pb-free packaging complies to the european directive for re striction of hazardous substances (rohs directive). also halide free and fully green. 3. for speed vs. v cc see figure 29-2 on page 332 . 4. tape & reel. 5. see characterization specification at 105c. 7.5 atmel atmega3290a speed [mhz] (3) power supply ordering code (2) package type (1) operational range 20 1.8 - 5.5v atmega3290a-au atmega3290a-aur (4) 100a 100a industrial (-4 0 ? c to 85 ? c) atmega3290a-an atmega3290a-anr (4) 100a 100a extended (-4 0 ? c to 105 ? c) (5) package type 100a 100-lead, 14 14 1.0mm, 0.5mm lead pitch, thin profile plastic q uad flat package (tqfp)
17 atmega169a/pa/329a/pa/649a/p/3 290a/pa/6490a/p [summary] 8284es?avr?02/2013 notes: 1. this device can also be supplied in wafer form. please contact your local atmel sales office for detailed ordering info rmation and minimum quantities. 2. pb-free packaging complies to the european directive for re striction of hazardous substances (rohs directive). also halide free and fully green. 3. for speed vs. v cc see figure 29-2 on page 332 . 4. tape & reel. 5. see characterization specification at 105c. 7.6 atmel atmega3290pa speed [mhz] (3) power supply ordering code (2) package type (1) operational range 20 1.8 - 5.5v atmega3290pa-au atmega3290pa-aur (4) 100a 100a industrial (-4 0 ? c to 85 ? c) atmega3290pa-an atmega3290pa-anr (4) 100a 100a industrial (-4 0 ? c to 105 ? c) (5) package type 100a 100-lead, 14 14 1.0mm, 0.5mm lead pitch, thin profile plastic q uad flat package (tqfp)
18 atmega169a/pa/329a/pa/649a/p/3 290a/pa/6490a/p [summary] 8284es?avr?02/2013 7.7 atmel atmega649a notes: 1. this device can also be supplied in wafer form. please contact your local atmel sales office for detailed ordering info rmation and minimum quantities. 2. pb-free packaging complies to the european directive for re striction of hazardous substances (rohs directive). also halide free and fully green. 3. for speed vs. v cc see figure 29-1 on page 332 . 4. tape & reel. speed [mhz] (3) power supply ordering code (2) package type (1) operational range 16 1.8 - 5.5v atmega649a-au atmega649a-aur (4) atmega649a-mu atmega649a-mur (4) 64a 64a 64m1 64m1 industrial (-4 0 ? c to 85 ? c) package type 64a 64-lead, 14 14 1.0mm, thin profile plastic quad flat package (tqfp) 64m1 64-pad, 9 9 1.0mm, quad flat no-l ead/micro lead frame package (qfn/mlf)
19 atmega169a/pa/329a/pa/649a/p/3 290a/pa/6490a/p [summary] 8284es?avr?02/2013 7.8 atmel atmega649p notes: 1. this device can also be supplied in wafer form. please contact your local atmel sales office for detailed ordering info rmation and minimum quantities. 2. pb-free packaging complies to the european directive for re striction of hazardous substances (rohs directive). also halide free and fully green. 3. for speed vs. v cc see figure 29-1 on page 332 . 4. tape & reel. speed [mhz] (3) power supply ordering code (2) package type (1) operational range 16 1.8 - 5.5 v atmega649p-au atmega649p-aur (4) atmega649p-mu atmega649p-mur (4) 64a 64a 64m1 64m1 industrial (-4 0 ? c to 85 ? c) package type 64a 64-lead, 14 14 1.0mm, thin profile plastic quad flat package (tqfp) 64m1 64-pad, 9 9 1.0mm, quad flat no-l ead/micro lead frame package (qfn/mlf)
20 atmega169a/pa/329a/pa/649a/p/3 290a/pa/6490a/p [summary] 8284es?avr?02/2013 7.9 atmel atmega6490a notes: 1. this device can also be supplied in wafer form. please contact your local atmel sales office for detailed ordering info rmation and minimum quantities. 2. pb-free packaging complies to the european directive for re striction of hazardous substances (rohs directive). also halide free and fully green. 3. for speed vs. v cc see figure 29-2 on page 332 . 4. tape & reel. speed [mhz] (3) power supply ordering code (2) package type (1) operational range 20 1.8 - 5.5v atmega6490a-au atmega6490a-aur (4) 100a 100a industrial (-4 0 ? c to 85 ? c) package type 100a 100-lead, 14 14 1.0mm, 0.5mm lead pitch, thin profile plastic q uad flat package (tqfp)
21 atmega169a/pa/329a/pa/649a/p/3 290a/pa/6490a/p [summary] 8284es?avr?02/2013 7.10 atmel atmega6490p notes: 1. this device can also be supplied in wafer form. please contact your local atmel sales office for detailed ordering info rmation and minimum quantities. 2. pb-free packaging complies to the european directive for re striction of hazardous substances (rohs directive). also halide free and fully green. 3. for speed vs. v cc see figure 29-2 on page 332 . 4. tape & reel. speed [mhz] (3) power supply ordering code (2) package type (1) operational range 20 1.8 - 5.5v atmega6490p-au atmega6490p-aur (4) 100a 100a industrial (-4 0 ? c to 85 ? c) package type 100a 100-lead, 14 14 1.0mm, 0.5mm lead pitch, thin profile plastic q uad flat package (tqfp)
22 atmega169a/pa/329a/pa/649a/p/3 290a/pa/6490a/p [summary] 8284es?avr?02/2013 8. packaging information 8.1 64a 2325 orchard parkway san jose, ca 95131 title drawing no. rev. 64a, 64-lead, 14 x 14mm body size, 1.0mm body thickness, 0.8mm lead pitch, thin profile plastic quad flat package (tqfp) c 64a 2010-10-20 pin 1 identifier 0~7 pin 1 l c a1 a2 a d1 d e e1 e b common dimen s ion s (unit of measure = mm) s ymbol min nom max note notes: 1.this package conforms to jedec reference ms-026, variation aeb. 2. dimensions d1 and e1 do not include mold protrusion. allowable protrusion is 0.25mm per side. dimensions d1 and e1 are maximum plastic body size dimensions including mold mismatch. 3. lead coplanarity is 0.10mm maximum. a ? ? 1.20 a1 0.05 ? 0.15 a2 0.95 1.00 1.05 d 15.75 16.00 16.25 d1 13.90 14.00 14.10 note 2 e 15.75 16.00 16.25 e1 13.90 14.00 14.10 note 2 b 0.30 ? 0.45 c 0.09 ? 0.20 l 0.45 ? 0.75 e 0.80 typ 2325 orchard parkway san jose, ca 95131 title drawing no. rev. 64a, 64-lead, 14 x 14mm body size, 1.0mm body thickness, 0.8mm lead pitch, thin profile plastic quad flat package (tqfp) c 64a 2010-10-20 pin 1 identifier 0~7 pin 1 l c a1 a2 a d1 d e e1 e b common dimen s ion s (unit of measure = mm) s ymbol min nom max note notes: 1.this package conforms to jedec reference ms-026, variation aeb. 2. dimensions d1 and e1 do not include mold protrusion. allowable protrusion is 0.25mm per side. dimensions d1 and e1 are maximum plastic body size dimensions including mold mismatch. 3. lead coplanarity is 0.10mm maximum. a ? ? 1.20 a1 0.05 ? 0.15 a2 0.95 1.00 1.05 d 15.75 16.00 16.25 d1 13.90 14.00 14.10 note 2 e 15.75 16.00 16.25 e1 13.90 14.00 14.10 note 2 b 0.30 ? 0.45 c 0.09 ? 0.20 l 0.45 ? 0.75 e 0.80 typ
23 atmega169a/pa/329a/pa/649a/p/3 290a/pa/6490a/p [summary] 8284es?avr?02/2013 8.2 64m1 2325 orchard parkway san jose, ca 95131 title drawing no. r rev. 64m1 , 64-pad, 9 x 9 x 1.0 mm body, lead pitch 0.50 mm, h 64m1 2010-10-19 common dimen s ion s (unit of measure = mm) s ymbol min nom max note a 0.80 0.90 1.00 a1 ? 0.02 0.05 b 0.18 0.25 0.30 d d2 5.20 5.40 5.60 8.90 9.00 9.10 8.90 9.00 9.10 e e2 5.20 5.40 5.60 e 0.50 bsc l 0.35 0.40 0.45 notes: 1. jedec standard mo-220, (saw singulation) fig. 1, vmmd. 2. dimension and tolerance conform to asmey14.5m-1994. top view s ide view bottom view d e marked pin# 1 id seating plane a1 c a c 0.08 1 2 3 k 1.25 1.40 1.55 e2 d2 b e pin #1 corner l pin #1 triangle pin #1 chamfer (c 0.30) option a option b pin #1 notch (0.20 r) option c k k 5.40 mm exposed pad, micro lead frame package (mlf) 2325 orchard parkway san jose, ca 95131 title drawing no. r rev. 64m1 , 64-pad, 9 x 9 x 1.0 mm body, lead pitch 0.50 mm, h 64m1 2010-10-19 common dimen s ion s (unit of measure = mm) s ymbol min nom max note a 0.80 0.90 1.00 a1 ? 0.02 0.05 b 0.18 0.25 0.30 d d2 5.20 5.40 5.60 8.90 9.00 9.10 8.90 9.00 9.10 e e2 5.20 5.40 5.60 e 0.50 bsc l 0.35 0.40 0.45 notes: 1. jedec standard mo-220, (saw singulation) fig. 1, vmmd. 2. dimension and tolerance conform to asmey14.5m-1994. top view s ide view bottom view d e marked pin# 1 id seating plane a1 c a c 0.08 1 2 3 k 1.25 1.40 1.55 e2 d2 b e pin #1 corner l pin #1 triangle pin #1 chamfer (c 0.30) option a option b pin #1 notch (0.20 r) option c k k 5.40 mm exposed pad, micro lead frame package (mlf)
24 atmega169a/pa/329a/pa/649a/p/3 290a/pa/6490a/p [summary] 8284es?avr?02/2013 8.3 64mc title drawing no. gpc rev. packa g e drawin g contact: packagedrawings@atmel.com 64mc zxc a 64mc, 64qfn (2-row staggered), 7 x 7 x 1.00 mm body, 4.0 x 4.0 mm exposed pad, quad flat no lead package 10/3/07 common dimen s ion s (unit of measure = mm) s ymbol min nom max note a 0.80 0.90 1.00 a1 0.00 0.02 0.05 b 0.18 0.23 0.28 c 0.20 ref d 6.90 7.00 7.10 d2 3.95 4.00 4.05 e 6.90 7.00 7.10 e2 3.95 4.00 4.05 et ? 0.65 ? er ? 0.65 ? k 0.20 ? ? (ref) l 0.35 0.40 0.45 y 0.00 ? 0.075 s ide view top view bottom view note: 1. the terminal #1 id is a laser-marked feature . pin 1 id d e a1 a y c et/2 r0.20 0.40 b1 a1 b30 a34 b a8 b7 et d2 b16 a18 b22 a25 e2 k (0.1) ref b8 a9 (0.18) ref l b15 a17 l er a26 b23 et
25 atmega169a/pa/329a/pa/649a/p/3 290a/pa/6490a/p [summary] 8284es?avr?02/2013 8.4 100a 2325 orchard parkway san jose, ca 95131 title drawing no. r rev. 100a, 100-lead, 14 x 14mm body size, 1.0mm body thickness, 0.5mm lead pitch, thin profile plastic quad flat package (tqfp) d 100a 2010-10-20 pin 1 identifier 0~7 pin 1 l c a1 a2 a d1 d e e1 e b a ? ? 1.20 a1 0.05 ? 0.15 a2 0.95 1.00 1.05 d 15.75 16.00 16.25 d1 13.90 14.00 14.10 note 2 e 15.75 16.00 16.25 e1 13.90 14.00 14.10 note 2 b 0.17 ? 0.27 c 0.09 ? 0.20 l 0.45 ? 0.75 e 0.50 typ notes: 1. this package conforms to jedec reference ms-026, variation aed. 2. dimensions d1 and e1 do not include mold protrusion. allowable protrusion is 0.25mm per side. dimensions d1 and e1 are maximum plastic body size dimensions including mold mismatch. 3. lead coplanarity is 0.08mm maximum. common dimen s ion s (unit of measure = mm) s ymbol min nom max note
26 atmega169a/pa/329a/pa/649a/p/3 290a/pa/6490a/p [summary] 8284es?avr?02/2013 9. errata 9.1 atmel atmega169a no known errata 9.2 atmel atmega169a/169pa rev. a to f not sampled. 9.3 atmel atmega169pa rev. g no known errata. 9.4 atmel atmega329a/329pa rev. a ? interrupts may be lost when writing the timer registers in th e asynchronous timer ? using bod disable will make the chip reset 1. interrupts may be lost when writing the timer registers in the asynchronous timer the interrupt will be lost if a timer register that is synchronous timer clock is written when the asynchronous timer/counter register (tcntx) is 0x00. problem fix/ workaround always check that the asynchronous timer/counter register neither have the value 0xff nor 0x00 before writ- ing to the asynchronous timer control register (tccrx ), asynchronous timer counter register (tcntx), or asynchronous output compare register (ocrx). 2. using bod disable will make the chip reset if the part enters sleep with the bod turned off with the bod disable option enabled, a bod reset will be generated at wakeup and the chip will reset. problem fix/workaround do not use bod disable 9.5 atmel atmega329a/329pa rev. b ? interrupts may be lost when writing the timer registers in th e asynchronous timer 1. interrupts may be lost when writing the timer registers in the asynchronous timer the interrupt will be lost if a timer register that is synchronous timer clock is written when the asynchronous timer/counter register (tcntx) is 0x00. problem fix/ workaround always check that the asynchronous timer/counter register neither have the value 0xff nor 0x00 before writ- ing to the asynchronous timer control register (tccrx ), asynchronous timer counter register (tcntx), or asynchronous output compare register (ocrx).
27 atmega169a/pa/329a/pa/649a/p/3 290a/pa/6490a/p [summary] 8284es?avr?02/2013 9.6 atmel atmega329a/329pa rev. c ? interrupts may be lost when writing the timer registers in th e asynchronous timer 1. interrupts may be lost when writing the timer registers in the asynchronous timer the interrupt will be lost if a timer register that is synchronous timer clock is written when the asynchronous timer/counter register (tcntx) is 0x00. problem fix/ workaround always check that the asynchronous timer/counter register neither have the value 0xff nor 0x00 before writ- ing to the asynchronous timer control register (tccrx ), asynchronous timer counter register (tcntx), or asynchronous output compare register (ocrx). 9.7 atmel atmega3290a/3290pa rev. a ? interrupts may be lost when writing the timer registers in th e asynchronous timer ? using bod disable will make the chip reset 1. interrupts may be lost when writing the timer registers in the asynchronous timer the interrupt will be lost if a timer register that is synchronous timer clock is written when the asynchronous timer/counter register (tcntx) is 0x00. problem fix/ workaround always check that the asynchronous timer/counter register neither have the value 0xff nor 0x00 before writ- ing to the asynchronous timer control register (tccrx ), asynchronous timer counter register (tcntx), or asynchronous output compare register (ocrx). 2. using bod disable will make the chip reset if the part enters sleep with the bod turned off with the bod disable option enabled, a bod reset will be generated at wakeup and the chip will reset. problem fix/workaround do not use bod disable 9.8 atmel atmega3290a/3290pa rev. b ? interrupts may be lost when writing the timer registers in th e asynchronous timer 1. interrupts may be lost when writing the timer registers in the asynchronous timer the interrupt will be lost if a timer register that is synchronous timer clock is written when the asynchronous timer/counter register (tcntx) is 0x00. problem fix/ workaround always check that the asynchronous timer/counter register neither have the value 0xff nor 0x00 before writ- ing to the asynchronous timer control register (tccrx ), asynchronous timer counter register (tcntx), or asynchronous output compare register (ocrx).
28 atmega169a/pa/329a/pa/649a/p/3 290a/pa/6490a/p [summary] 8284es?avr?02/2013 9.9 atmel atmega3290a/3290pa rev. c ? interrupts may be lost when writing the timer registers in th e asynchronous timer 1. interrupts may be lost when writing the timer registers in the asynchronous timer the interrupt will be lost if a timer register that is synchronous timer clock is written when the asynchronous timer/counter register (tcntx) is 0x00. problem fix/ workaround always check that the asynchronous timer/counter register neither have the value 0xff nor 0x00 before writ- ing to the asynchronous timer control register (tccrx ), asynchronous timer counter register (tcntx), or asynchronous output compare register (ocrx). 9.10 atmel atmega649a /649p/atmega6490a/6490p no known errata.
atmel corporation 1600 technology drive san jose, ca 95110 usa tel: (+1) (408) 441-0311 fax: (+1) (408) 487-2600 www.atmel.com atmel asia limited unit 01-5 & 16, 19f bea tower, millennium city 5 418 kwun tong roa kwun tong, kowloon hong kong tel: (+852) 2245-6100 fax: (+852) 2722-1369 atmel munich gmbh business campus parkring 4 d-85748 garching b. munich germany tel: (+49) 89-31970-0 fax: (+49) 89-3194621 atmel japan g.k. 16f shin-osaki kangyo bldg 1-6-4 osaki, shinagawa-ku tokyo 141-0032 japan tel: (+81) (3) 6417-0300 fax: (+81) (3) 6417-0370 ? 2013 atmel corporation. all rights reserved. / rev.: 8284es?avr?02/2013 disclaimer: the information in this document is provided in co nnection with atmel products. no lic ense, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of atmel products. exc ept as set forth in the atmel terms and conditions of sales locat ed on the atmel website, atmel assumes no liability whatsoever and disclaims any express, implied or statutory warranty relating to its products including, but not li mited to, the implied warranty of merchantability, fitness for a particular purpose, or non-infringement. in no event shall atmel be liable for any d irect, indirect, consequential, punitive, special or incide ntal damages (including, without limitation, damages for loss and profits, business i nterruption, or loss of information) arising out of the us e or inability to use this document, even if at mel has been advised of the possibility of suc h damages. atmel makes no representations or warranties with respect to the accuracy or completeness of the contents of this document and reserves the ri ght to make changes to specifications and products descriptions at any time without notice. atmel does not make any commitment to update th e information contained herein. un less specifically provided oth erwise, atmel products are not suitable for, and shall not be used in, automotive applications. atmel products are not intended, authorized, or warranted for use as components in applications intend ed to support or sustain life. atmel ? , atmel logo and combinations thereof, enabling unlimited possibilities ? , and others are registered trademarks or trademarks of atmel corporation or its subsidiaries. other terms and product names may be trademarks of others.

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